IBM and Samsung engineers create vertical VTFETs that can either increase power or reduce energy consumption

At the recently held IDEM conference in San Francisco, USA, representatives from IBM and Samsung presented to the public their new development, which implies a vertical arrangement of transistors in chips.

This technology is called Vertical Transport Field Effect Transistor (VTFET), which makes it possible or significantly increases power, or significantly reduce the power consumption of the chip compared to common microcircuits of the same size.

New development and its prospects

As you know, when creating modern processors and chips, transistors are applied to a silicon pad in the horizontal plane. VTFET technology implies their vertical placement. And according to the developers themselves, this approach has two significant advantages at once.

So, due to the use of VTFET, it is possible to bypass many of the existing restrictions due to the action of Moore's law.

For reference. According to Moore's Law, the total number of transistors that are placed on an integrated circuit chip doubles every two years.

And also thanks to the use of a new design, electrical losses can be significantly reduced by using more efficient energy flow redirection.

So, according to the calculations of specialists, this approach will make it possible to create new chips that will be or at least twice as large efficient existing analogs, or will consume 85% less energy than analogs that are being developed using the technology FinFET.

In the future, experts believe that chips produced using VTFET technology will make it possible to produce, for example, cell phones that will work on a single battery charge up to one week and / or easily perform energy-consuming operations, for example, perform cryptomining with reduced consumption energy.

It is not yet known when such chips will be fully used in modern electronic devices. So we will follow the development of this technology in the future.

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